Here are two versions of the setup files needed to synthesize the Leon SPARC core. One is the standard dc_shell setup file and the other is the tcl (dc_shell-t) setup file. Depending on which shell you are using (tcl or standard) you must have the appropriate setup file in the directory that you run dc_shell (or dc_shell-t) from to synthesize the Leon SPARC processor.
file must be named ".synopsys_dc.setup"
/* library setup for CMOS 0.18um - Leon SPARC project */
/* System variables */
sh_command_abbrev_mode = "Anywhere"
sh_continue_on_error = "false"
sh_enable_page_mode = "true"
sh_source_uses_search_path = "true"
sh_new_variable_message = "true"
search_path = {"." "/cad/linux/synopsys/2003.06-SP1/libraries/syn"
"/cad/linux/synopsys/2003.06-SP1/dw/sim_ver" "/clocking/leon2-1.0.13/syn"
"/cad/synopt/cell_library/tsmc018/fb_tpz973g_220a/TSMCHOME/digital/synopsys/tpz973g_220a/"
"/home/gricardo/ram_lib/"}
target_library = {"typical_detff.db", "tpz973gbc.db", "ram4096x32.db","dpram168x32.db", "dpram256x32.db", "ram512x26.db"}
link_library = {"typical_detff.db", "tpz973gbc.db", "ram4096x32.db","dpram168x32.db", "dpram256x32.
db", "ram512x26.db"}
link_library = "*" + link_library
symbol_library = "tsmc18.sdb generic.sdb"
allow_newer_db_files = "true";
designer = "Gabriel Ricardo"
company = "UCDavis-ACSEL"
/* supress the following warnings */
suppress_errors = {"OPT-170", "OPT-1205", "VHDL-2285", "HDL-395", "HDL-6", "LINT-30", "PWR-18
", "OPT-932", "OPT-317"}
This file can be called whatever and sourced from the dc_shell-t command line, or must be called .synopsys_dc.setup
# library setup for CMOS 0.18um - Leon SPARC project
# System variables
set sh_command_abbrev_mode "Anywhere"
set sh_continue_on_error "false"
set sh_enable_page_mode "true"
set sh_source_uses_search_path "true"
set sh_new_variable_message "true"
set search_path [list . /cad/linux/synopsys/2003.06-SP1/libraries/syn /cad/linux/synopsys/2003.06-SP1/dw/sim_ver
/clocking/leon2-1.0.13/syn
/cad/synopt/cell_library/tsmc018/fb_tpz973g_220a/TSMCHOME/digital/synopsys/tpz973g_220a/ /home/gricardo/ram_lib/]
set target_library {typical_detff.db tpz973gbc.db ram4096x32.db dpram168x32.db dpram256x32.db ram512x26.db}
set link_library {typical_detff.db tpz973gbc.db ram4096x32.db dpram168x32.db dpram256x32.db ram512x26.db}
set link_library { * link_library}
set symbol_library {tsmc18.sdb generic.sdb}
set allow_newer_db_files "true"
set designer "Gabriel Ricardo"
set company "UCDavis-ACSEL"
# supress the following warnings
set suppress_errors {OPT-170 OPT-1205 VHDL-2285 HDL-395 HDL-6 LINT-30 PWR-18 OPT-932 OPT-317
}
source ./rpt_cells.tcl